Semiconductor tests have traditionally been implemented by docking Automatic Test Equipment (ATE) (also referred to as “testers”) to material handling equipment. Typically, testers provide electrical stimulation and response capture, while the handling equipment places the units or devices being tested into contactors and provides thermal conditioning. However, these conventional solutions are known for ganging the devices being tested in parallel and introducing a number of compromises. For example, devices being tested are densely packed together and the tooling to electrically connect them is difficult to design, while connections are often limited to less than the numbers desired, etc. Another severe limitation of conventional systems is that the socketing cycle has to wait until the last device under test (“DUT”) completes testing. This means that devices that finish testing earlier have to wait idle in the contactor, which significantly reduces the overall utilization of the test equipment.